Difference between revisions of "R8000"
(R8000 docs, finally!)
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== Vaporware ==
== Vaporware ==
H1 or as it's codename was Beast was another
H1 or as it's codename was Beast was another [[Instruction_Set_Architecture#MIPS_V|MIPS V]] microprocessor. Little was known about beast except it being designed by the same people that made the R8000. Supposedly being a 12-issue processor would have made it's design an extremly ambitious project, probably again with a massive between integer and floating point performance. Announced on [[May 12]]-[] end along with successor H2 codenamed Capitan was already announced on [[August 4]] of the same year. Capitan was aiming at increasing memory bandwidth and scalability. It's believed that axing these two projects was a good idea because of the extreme complexity of designing a new microprocessor from scratch. The [[R10000]] successors did demonstrate that an evolutionary approach indeed can work well.
== Documentation ==
== Documentation ==
Revision as of 17:16, 31 October 2007
The R8000 which was introduced in 1994 was the first superscalar MIPS design, able to execute two ALU and two memory operations per cycle. The design was spread over six chips: an integer unit (with 16KB instruction and 16KB L1 data caches), a floating-point unit, three full-custom secondary cache tag RAMs (two for secondary cache accesses, one for bus snooping), and a cache controller ASIC. The design had two fully pipelined double precision multiply-add units, which could stream data from the 4MB off-chip secondary cache. The R8000 powered SGI's Power Challenge computer servers in the mid 1990s and later became available in the Indigo2 Power workstation. Its limited integer performance and high cost dampened appeal for most users, although its FPU performance fit scientific users quite well, and the R8000 was in the marketplace for only a year and remains fairly rare.
H1 or as it's codename was Beast was another high performance MIPS V microprocessor. Little was known about the beast except it being designed by the same people that made the R8000. Supposedly being a 12-issue processor would have made it's design an extremly ambitious project, probably again with a massive imbalance between integer and floating point performance. Announced on May 12-1997 its end along with its successor H2 codenamed Capitan was already announced on August 4 of the same year. Capitan was aiming at increasing memory bandwidth and scalability. It's believed that axing these two projects was a good idea because of the extreme complexity of designing a new microprocessor from scratch. The R10000 successors did demonstrate that an evolutionary approach indeed can work well.
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At this time unfortunately only paper compies of the R8000 manuals are available, so the electronic documents available here are PDFs created from 300dpi scans. We'll continue trying to obtain electronic copies of these documents and make them available on this page. This is a 15MB PDF file primarily intended for printing. It will display very slowly in all but the fastest pdf readers.
This 35MB tarball contains the unprocessed 300dpi bw and greyscale scans. Mostly here in case a bold soul wants to try to ocr the documents.