The MIPS Malta is an ATX formfactor evaluation board made by MIPS Technologies. It supports a large variety of processor options; common processor types are 4Kc, 4KEc, 5Kc or a 24Kc core. The Malta board has four 32-bit PCI slots that are usually clocked at 33MHz, onboard Ethernet and 16550 compatible DUART. It has Intel 82371AB PIIX4 (Southbridge) onboard which provides an PCI IDE, USB, and conventional PC-compatible peripherials : two i8259 IAC, i8254 timer, mc146818 RTC e.t.c. The Malta can operate in big endian or little endian mode. This is accomplished by a BIGEND switch on the board.
Malta board may be equipped with various "Core cards". A core card includes a CPU, a system controller (aka Northbridge) and SDRAM module.
|CoreLV||1||MIPS32 4K, MIPS645K||GT64120|
|CoreBonito64||2||QED RM5261, QED RM7061A||Bonito64|
|Core20K||3||MIPS64 20Kc, MIPS64 25Kf||Bonito64|
|CoreFPGA||4||MIPS32 4K, MIPS64 5K||GT64120|
|CoreFPGA2||7||.||MIPS SOC-it 101|
The GT64110/GT64120 from Galileo Technology Inc. (acquired by Marvel) are designed to connect a high speed processor to peripheral devices. It connects the CPU to an asynchronous local device bus which is used to interface with the boot EPROM, Serial I/O, and Flash memory. It also has a built-in DRAM controller for interfacing the processor to the onboard SDRAM main memory with minimal glue logic. In addition, the chip provides a CPU bus to PCI bus bridge. This chip is also used in the Cobalt, Galileo avaluation boards and in CISCO 7200 routers.
Malta uses YAMON for it's firmware. YAMON determines various Core cards automatically.
The Malta is fully supported by Linux 2.4 and Linux 2.6. Since generally the main CVS tree on linux-mips.org is more geared towards development a separate Malta CVS repository that's geared towards absolute stability on Malta.
A long standing bug in the kernel's memcpy is prefetching beyond the source and destination areas. That's usually harmless unless the prefetched addresses are outside of any RAM area. In this case the Malta board will signal a bus error exception which will result in a kernel crash. The issue was being discussed on the linux-mips mailing list. The workaround is to disable the use of prefetch instructions by disabling the CONFIG_HAS_PREFETCH instruction or alternativly making sure the last page of each memory area isn't being used. Other boards are likely to be affected also.