Difference between revisions of "Coherence Manager"
From LinuxMIPS
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== External Links == | == External Links == | ||
[http://www.imgtec.com/mips/docs/interaptiv/MIPS_interAptiv_PB_US_512.pdf interAptiv overview with diagram showing CM and IOCU] | [http://www.imgtec.com/mips/docs/interaptiv/MIPS_interAptiv_PB_US_512.pdf interAptiv overview with diagram showing CM and IOCU] | ||
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| + | [http://www.design-reuse.com/articles/18620/ocp-embedded-multi-core-cluster.html Article discussing the MIPS CM] | ||
Latest revision as of 10:12, 20 November 2013
Coherence Manager (CM) is part of the MIPS multi-core cluster IP solution from IMG/MIPS. It maintains coherency for the shared L2 cache, and provides an optional IOCU path for coherent peripheral memory transactions.
There is a family of CM units, including at least CM and CM2.
CM is used with at least the 1004k, 1074k, interAptiv, proAptiv and Warrior generation of cores.
