Difference between revisions of "Aptiv"

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== See also ==
 
== See also ==
 
* http://www.youtube.com/watch?v=3EHVM17RJcg MIPS propaganda video for the Aptiv cores.
 
* http://www.youtube.com/watch?v=3EHVM17RJcg MIPS propaganda video for the Aptiv cores.
* http://www.imgtec.com/mips/mips-proaptiv.asp IMG proAptiv web page
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* http://www.imgtec.com/mips/aptiv/proaptiv.asp IMG proAptiv web page
 
* http://git.linux-mips.org/?p=linux-mti.git;a=summary [[LinuxMipsOrg|LMO]] hosted IMG mti git page
 
* http://git.linux-mips.org/?p=linux-mti.git;a=summary [[LinuxMipsOrg|LMO]] hosted IMG mti git page
  
 
[[category:MIPS32 Release 3]]
 
[[category:MIPS32 Release 3]]

Revision as of 10:47, 2 February 2015

MIPS announced the Aptiv product line on May 10, 2012. The Aptiv series are MIPS32 Release 3 and consists of three family members:

  • proAptiv: I/O coherence manager (CM), Global Interrupt Controller (GIC), FPU, MIPS16e, multi-core
  • interAptiv: I/O coherence manager (CM), Global Interrupt Controller (GIC), FPU multi-core, multi-thread (MT)
  • microAptiv: microMIPS, DSP ASE Rev 2.
    • A standard MIPS TLB and a simpler segmented MMU are synthesizable options of the core, giving two variants of core - the MCU (not Linux capable) and the MPU (Linux capable). There is no FPU option for the microAptiv.

Linux support

The proAptiv and interAptiv cores are supported in the mainline Linux kernel since 3.14-rc1

See also