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The Alchemy SOC family is based on an Alchemy-proprietary MIPS32 core. The models are called Au1000, Au1100, Au1500, Au1550, Au1200, Au1210, and Au1250.

Alchemy Semiconductor has been acquired by AMD in 2002, which recently (summer 2006) sold the Alchemy processor line to Raza Microelectronics, Inc.

Devices based on the Alchemy SoCs

Personal Media Players

Wast majority of this devices are based on the RMI Alchemyâ„¢ Au1200â„¢ Personal Media Player Reference Design

  • FIC Vassili Personal Media Player uses 400 MHz Au1200 Processor
  • Hyon Xent X3: Alchemy Au1200 500MHz, 32Mb NOR FLASH, 128Mb DDR2 SDRAM, 800x480 WVGA TouchScreen, USB OTG, GPS SiRFstarIII, WinCE 5.0
  • Cowon iAudio N2: 7-inch WQVGA (480Ñ…234), Alchemy 500MHz, 128Mb DDR2 SDRAM, 32Mb FLASH, 2xSD, USB OTG, GPS SiRFstarIII, WinCE 5.0
  • Cowon Q5: Alchemy Au1200 500MHz, 64Mb NOR FLASH, 128Mb DDR2 SDRAM, WinCE 5.0 Professional
  • Curon QCOX: Alchemy Au1200 500MHz, 128Mb DDR2, 3.4-inch (480x272), 30Gb, WinCE 5.0
  • Digital Cube i-Station M43: Alchemy Au1250, 4.3-inch WQVGA 480x272 touchscreen display, 30..60Gb GDD
  • Digital Cube i-Station T7: Alchemy Au1250, 7-inch 800x480, SD, SIRF III GPS, 30Gb HDD
  • Tinnos Blufin op67N, PMP and PDA in one. Includes 30 GB hard drive, 128MB of RAM, 4.3-inch color LCD (480x272), OtG USB, SD slot, integrated 2 megapixel camera and an Au1200 processor.
  • Samsung LMD10A-51W mobile Digital Multimedia Broadcast TV (DMB-TV) player, Au1200, 10-inch WVGA (800x480) screen. Linux 2.6.
  • Samsung SPF-71V Digital Photo Frame (Au1200, WindowsCE )
  • Sophia Mobile nani: Alchemy Au1250 600MHz, 4.3-inch WVGA (800x480), MicroSD
  • Episodic Media Inc. Viliv P2: Alchemy 400Mhz, 128Mb DDR2, WQVGA (480x272px) 4.3-inch, USB 2.0 OTG, 30..60Gb HDD, Window CE 5.0 / Linux Qtopia
  • Xroad V7: Alchemy Au1200 500MHz, 128Mb DDR, 7-inch 800x480, SD slot


By default the YAMON bootloader only enables the UARTs it is using, two at max. For Au1100/1550 only UART0 and UART3 are enabled, leaving UART1 non-functional. You can simply edit the reset source file named arch/init/reset_<name of your platform>.c to enable it. Check for the uart_enable register (Offset=0x0100 from the base address) in the databook. After you've enabled it, the Linux kernel serial driver is able to detect it.

See also

External links