AR7

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AR5

The early AR5 was a multi-chip ADSL solution.

  • TNET4310 MIPS32 4Kc
  • TNET4320 MIPS32 4Kc
  • TNET4400 MIPS32 4Kc
  • TNETD5301 MIPS32 4Kc
  • TNETD5310 MIPS32 4Kc
  • TNETD5320 MIPS32 4Kc

AR5 ADSL Router, Integrated Access Device And Residential Gateway Chipsets

AR7

The Texas Instrument AR7 is the fully integrated single-chip ADSL CPE access router solution. The AR7 combines a MIPS32 processor, a DSP-based digital transceiver, and an ADSL analog front end.

Features:

  • ADSL PHY subsystem based on TI C62x DSP, with integrated transceiver, codec, line driver, and line receiver
  • Integrated high performance MIPS 4KEc 32-Bit RISC processor
  • Integrated IEEE 802.3 PHY
  • Two IEEE 802.3 MACs with integrated Media Independent Interface (MII) and Quality of Service (QoS)
  • Integrated USB 1.1 compliant transceiver
  • Hardware accelerated ATM SAR
  • Two VLYNQ interfaces for compatible high-speed expansion devices
  • EJTAG, GIPO, UART, and FSER interfaces
  • 324 BGA with 1.0-mm ball pitch

The AR7W (TNETD7300) is an AR7 option with a interface for WiFi card.

TI does not provide detailed techical documentation for this SoC. Some details are known from the GPL-ed Linux sources.

Another source is a TI OMAP documentation. It seems, AR7 SoC peripherials is very close to the OMAP16xx and OMAP730 application processors , but MIPS instead ARM9-based.

The "GPL source code" as provided by the various vendors of TI AR7 (with linux) devices is incomplete, since TI apparently refuses to publish the source code to some of their core kernel modifications, such as LZMA (de)compression of the zImage. The gpl-violations.org project is actively trying to resolve this issue.

C62x DSP

TI TMS320C62x is a fixed-poind Digital Signal Processor core. C62x is based on the VelociTI VLIW architecture developad by TI. C62x is a member of the TI C6000 family.

VLYNQ

TI's VLYNQ is a low power, low pin-count serial communication interface that enables the extension of an internal bus segment to one or more external physical devices. The external devices are mapped into local, physical address space and appears as if they are on the internal bus. The external device must have a VLYNQ interface. The VLYNQ module serializes bus transactions in one device, transfers the serialized data via a VLYNQ port, and de-serializes the transaction in the external device. The VLYNQ interface is described in the TI SPRU768 document.

Devices are based on the Texas Instruments AR7

and many more

External links