Difference between revisions of "24K"
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The [[Instruction_Set_Architecture#MIPS32|MIPS32]] 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the '''24Kc''', '''24Kc Pro''', '''24Kf''' and '''24Kf Pro''' versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance. | The [[Instruction_Set_Architecture#MIPS32|MIPS32]] 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the '''24Kc''', '''24Kc Pro''', '''24Kf''' and '''24Kf Pro''' versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance. | ||
| − | The | + | The MIPS32 24K [[Mips Malta|Malta]] processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz. |
== Linux Support == | == Linux Support == | ||
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Linux 2.4 and 2.6 support the 24K since 2005-01-19. Linux 2.6 adds support for the 24KE including it's [[Instruction_Set_Architecture#DSP_ASE|DSP ASE]] on 2005-05-31. | Linux 2.4 and 2.6 support the 24K since 2005-01-19. Linux 2.6 adds support for the 24KE including it's [[Instruction_Set_Architecture#DSP_ASE|DSP ASE]] on 2005-05-31. | ||
| + | |||
| + | == See also == | ||
| + | |||
| + | * [[Atheros SOC|AR7100]] | ||
== External Links == | == External Links == | ||
| − | [http://www.mips.com/ | + | * [http://www.mips.com/products/cores/32-64-bit-cores/mips32-24k/ MIPS 24K] |
| + | * [http://www.mips.com/products/cores/32-64-bit-cores/mips32-24ke/ MIPS 24Ke] | ||
Revision as of 13:48, 19 August 2010
General Information
The MIPS 24K and 24KE series of cores are currently MIPS Technologies's high-end synthesizable 32-bit cores.
The MIPS32 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the 24Kc, 24Kc Pro, 24Kf and 24Kf Pro versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance.
The MIPS32 24K Malta processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz.
Linux Support
This processor is supported in both 2.4 and 2.6 Linux versions.
$ cat /proc/cpuinfo
system type : MIPS Malta processor : 0 cpu model : MIPS 24K V6.0 BogoMIPS : 16.00 wait instruction : yes microsecond timers : yes tlb_entries : 32 extra interrupt vector : yes hardware watchpoint : yes VCED exceptions : not available VCEI exceptions : not available
Linux 2.4 and 2.6 support the 24K since 2005-01-19. Linux 2.6 adds support for the 24KE including it's DSP ASE on 2005-05-31.
