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Re: L2 Caching and SIMMs format

To: riscy@sunsite.unc.edu
Subject: Re: L2 Caching and SIMMs format
From: Tommy Thorn <tthorn@daimi.aau.dk>
Date: Fri, 19 Nov 1993 16:22:35 +0100
References: <9311191406.AA12837@juliet.pac.sc.ti.com>
Reply-to: Tommy.Thorn@daimi.aau.dk
As Andreas has already said zillions of times, he would prefer using
an existing design.

The best bet yet, the riscWS/EISA (aka NEC ARCset 100) doesn't include
a secondary cache.

There is really little point in discussion such details before we have
the specs. for the riscWS design. For those who join in recently, here
is a report of the features of riscWS/EISA:

Andy writes:
> But perhaps we still are confused by some technical things.
> I'll summarize what my favourite design (NEC ARCset 100 or
> MTI riscWS/EISA, these are the same) is:
> - intended for a R4000PC/50.
> - On board SCSI, Floppy Controller, Ethernet Controller (AUI),
>   2 serial and 1 parallel port.
> - 4 free EISA slots.
> - Audio and mouse subsystem (serial #3) on an optional card (not EISA).
> - Video on an optional card (not EISA).
> - max. 128 MB Ram, two-way interleaved.
> We probably have the chance to use CPU modules without changing
> the board design, which is a *very* important issue.
Tommy.Thorn@daimi.aau.dk                   Staff-programmer
Aarhus University, Ny Munkegade 116        Phone: +45 89423223
DK-8000 Aarhus C, Denmark.                 Fax:   +45 86135725 
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