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Re: Mips chips/performance

To: riscy@pyramid.com
Subject: Re: Mips chips/performance
From: Drew Eckhardt <drew@frisbee.cs.Colorado.EDU>
Date: Tue, 10 Aug 1993 08:16:14 -0600
In-reply-to: Your message of "Tue, 10 Aug 1993 09:11:25 CDT." <9308101313.AA20811@gossip.pyramid.com>
Reply-to: riscy@pyramid.com
Sender: owner-riscy@pyramid.com

    Here's a little performance table:
        SpecINT Spec FP92       Mhz     Cache
    Mips 3000 27.3  29.3    40      0+128k          Dec 5240 numbers
    486/66        32    16      33/66   8k          Intel announcement*
    4000PC        35    34      50/100  8k+8k       Sgi periodic chart
    4200          55    30      40/80   8k+16k?     Nec Broshure (no details)*
    4000SC        60    58      50/100  8k+8k+1MB   SGI periodic chart
    Powerpc   60+       80+     66      32k         Motorolla ad *
    Pentium   64.5      56.9    66      8k+8k       Intel announcement * 
    R4400SC       97    88      75/150  16k+16k+1MB SGI periodic chart.
    IMHO anything at the 4200 performance level or above looks great to me.
    Question is how does the 4200 get it's speed?  It running 20% slower then t
    mips 4000PC, and supposedly has longer pipelines, and less fp support.

Posibilities are 

- longer pipelines

- bigger on-chip cache

- different process, since it is a low power 3.3V part

- different 'C' compiler used for marketing purposes

- extern second level caches

    Is it possible it supports a second level cache? 

At the 4200's price, and the PC's price, I rather doubt that it has built in 
support for a second level cache.  

    Or it it just above a very
    important 1st level cache threshold that gives it twice the perfomance of t
    4200 for this benchmark? (I.e. in real world not faster then the 4000PC)

Could be.
    Or was the 4200 paired with some custom memory subsystem that implemented
    a seperate cache controller for the 2nd level cache? 

Could be.


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