linux-mips
[Top] [All Lists]

[PATCH AUTOSEL 4.20 037/304] MIPS: Boston: Disable EG20T prefetch

To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: [PATCH AUTOSEL 4.20 037/304] MIPS: Boston: Disable EG20T prefetch
From: Sasha Levin <sashal@kernel.org>
Date: Mon, 28 Jan 2019 10:39:14 -0500
Cc: Paul Burton <paul.burton@mips.com>, linux-mips@linux-mips.org, Sasha Levin <sashal@kernel.org>, linux-mips@vger.kernel.org, devicetree@vger.kernel.org
Dkim-signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548690294; bh=XHvGrq9LUVK3VhEp6c72qxwXepi97IZhYICnHguuWkc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g5kBFrBS7oHHq+A8SbczQoZzywrZE1psXqqkFzY0Nx54GLI5DE3yhqGS6XPV1ySB7 zCF+FNi6LjpSkhWJBigcj/X9BZfMF1M/O7WlxqCpdIgP7AZiUGpyFtLe8desAhdRGA aDHrZRhgrp3NeP1iUNjmcSjfYLHO+P2uKU2aVtqw=
In-reply-to: <20190128154341.47195-1-sashal@kernel.org>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20190128154341.47195-1-sashal@kernel.org>
Sender: linux-mips-bounce@linux-mips.org
From: Paul Burton <paul.burton@mips.com>

[ Upstream commit 5ec17af7ead09701e23d2065e16db6ce4e137289 ]

The Intel EG20T Platform Controller Hub used on the MIPS Boston
development board supports prefetching memory to optimize DMA transfers.
Unfortunately for unknown reasons this doesn't work well with some MIPS
CPUs such as the P6600, particularly when using an I/O Coherence Unit
(IOCU) to provide cache-coherent DMA. In these systems it is common for
DMA data to be lost, resulting in broken access to EG20T devices such as
the MMC or SATA controllers.

Support for a DT property to configure the prefetching was added a while
back by commit 549ce8f134bd ("misc: pch_phub: Read prefetch value from
device tree if passed") but we never added the DT snippet to make use of
it. Add that now in order to disable the prefetching & fix DMA on the
affected systems.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21068/
Cc: linux-mips@linux-mips.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 arch/mips/boot/dts/img/boston.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/boot/dts/img/boston.dts 
b/arch/mips/boot/dts/img/boston.dts
index 65af3f6ba81c..84328afa3a55 100644
--- a/arch/mips/boot/dts/img/boston.dts
+++ b/arch/mips/boot/dts/img/boston.dts
@@ -141,6 +141,12 @@
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
 
+                               eg20t_phub@2,0,0 {
+                                       compatible = "pci8086,8801";
+                                       reg = <0x00020000 0 0 0 0>;
+                                       intel,eg20t-prefetch = <0>;
+                               };
+
                                eg20t_mac@2,0,1 {
                                        compatible = "pci8086,8802";
                                        reg = <0x00020100 0 0 0 0>;
-- 
2.19.1


<Prev in Thread] Current Thread [Next in Thread>
  • [PATCH AUTOSEL 4.20 037/304] MIPS: Boston: Disable EG20T prefetch, Sasha Levin <=