There are several actions that need to be done on entry into the kernel.
Currently these actions are performed in a mix of get_saved_sp and
SAVE_SOME. This commit introduces a macro named setup_kernel_mode which
will eventually contain all of the necessary steps to be taken on entry
into the kernel from user mode. For a start, we need to set register $28
to its kernel conventional usage of the current thread info. Move this
from SAVE_SOME into setup_kernel_mode and invoke it in its place.
As part of the move, ensure that the Octeon code does not leave the .set
mips64 active by adding a .set push & .set pop around it.
Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
---
arch/mips/include/asm/stackframe.h | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/arch/mips/include/asm/stackframe.h
b/arch/mips/include/asm/stackframe.h
index 2161357cc68f..494fe41f5619 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -48,6 +48,19 @@
#define STATMASK 0x1f
#endif
+ .macro setup_kernel_mode docfi=0
+
+ /* Set thread_info if we're coming from user mode */
+ ori $28, sp, _THREAD_MASK
+ xori $28, _THREAD_MASK
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+ .set push
+ .set mips64
+ pref 0, 0($28) /* Prefetch the current pointer */
+ .set pop
+#endif
+ .endm
+
.macro SAVE_AT docfi=0
.set push
.set noat
@@ -273,17 +286,12 @@
cfi_st $25, PT_R25, \docfi
cfi_st $28, PT_R28, \docfi
- /* Set thread_info if we're coming from user mode */
+ /* Set up kernel mode if we're coming from user */
mfc0 k0, CP0_STATUS
sll k0, 3 /* extract cu0 bit */
bltz k0, 9f
- ori $28, sp, _THREAD_MASK
- xori $28, _THREAD_MASK
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
- .set mips64
- pref 0, 0($28) /* Prefetch the current pointer */
-#endif
+ setup_kernel_mode \docfi
9:
.set pop
.endm
--
2.7.4
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