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[PATCH 0/8] KVM: MIPS: Add Cavium Octeon III support

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Subject: [PATCH 0/8] KVM: MIPS: Add Cavium Octeon III support
From: James Hogan <>
Date: Tue, 14 Mar 2017 10:25:43 +0000
Cc: James Hogan <>, Paolo Bonzini <>, Radim Krčmář <>, Ralf Baechle <>, David Daney <>, Andreas Herrmann <>
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This series is based on my recent VZ series.
My hope is to take this series via the MIPS KVM tree for 4.12.

This series implements support for Cavium Octeon III CPUs in KVM
(primarily for VZ hardware, but trap & emulate should also work).

Patch 1 adds register accesses and definitions for the virtualization
related Cavium specific COP0 registers, which will be used by later

Patches 2-7 make various changes to allow KVM to work on Cavium Octeon
III, with Patch 5 doing the all important Cavium specific partitioning
of the TLB between root and guest and guest IRQ setup.

Finally patch 8 selects HAVE_KVM from CPU_CAVIUM_OCTEON to allow KVM to
be enabled.

Cc: Paolo Bonzini <>
Cc: "Radim Krčmář" <>
Cc: Ralf Baechle <>
Cc: David Daney <>
Cc: Andreas Herrmann <>

James Hogan (8):
  MIPS: Add Octeon III register accessors & definitions
  KVM: MIPS/Emulate: Adapt T&E CACHE emulation for Octeon
  KVM: MIPS/TLB: Handle virtually tagged icaches
  KVM: MIPS/T&E: Report correct dcache line size
  KVM: MIPS/VZ: VZ hardware setup for Octeon III
  KVM: MIPS/VZ: Emulate hit CACHE ops for Octeon III
  KVM: MIPS/VZ: Handle Octeon III guest.PRid register
  MIPS: Allow KVM to be enabled on Octeon CPUs

 arch/mips/Kconfig                |   1 +-
 arch/mips/include/asm/mipsregs.h |  38 ++++++++-
 arch/mips/kvm/emulate.c          |  30 +++++-
 arch/mips/kvm/tlb.c              |  30 ++++++-
 arch/mips/kvm/trap_emul.c        |   8 ++-
 arch/mips/kvm/vz.c               | 150 +++++++++++++++++++++++++-------
 arch/mips/mm/cache.c             |   1 +-
 7 files changed, 225 insertions(+), 33 deletions(-)

git-series 0.8.10

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