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Re: [PATCH V7 1/3] MIPS: Rearrange PTE bits into fixed positions.

To: "Steven J. Hill" <Steven.Hill@imgtec.com>
Subject: Re: [PATCH V7 1/3] MIPS: Rearrange PTE bits into fixed positions.
From: David Daney <ddaney.cavm@gmail.com>
Date: Fri, 27 Feb 2015 09:52:15 -0800
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
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On 02/26/2015 07:38 PM, Steven J. Hill wrote:
On 02/26/2015 06:51 PM, David Daney wrote:

That's not really what I meant in my previous response on the subject.
When I said:

     Why not just use RI for everything, instead of taking up two bits
     to represent a single binary concept?

     For the case where there is no RI hardware active, it is a purely
     software bit and you can easily invert the meaning and just have a
     _PAGE_NO_READ bit.

I envisioned something like:

     64-bit, all revisions:    CCC D V G RI XI [S H] M A W P
     32-bit, all revisions:    CCC D V G RI XI M A W P

Which is what I implemented.

I think there is still misunderstanding.

Your patches leave us with definitions for *both* _PAGE_READ *and* _PAGE_NO_READ defined in the source code. My suggestion was to eliminate all vestiges of _PAGE_READ and _PAGE_READ_SHIFT, and unify all variants to use _PAGE_NO_READ

I now only use one bit that functions
either as _PAGE_READ or _PAGE_READ_ONLY depending on the RI/XI
functionality present. Did you bother to read the code and understand
it, or just look at the commit message?

I did read it, see above.


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