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Re: [PATCH V7 1/3] MIPS: Rearrange PTE bits into fixed positions.

To: David Daney <ddaney.cavm@gmail.com>
Subject: Re: [PATCH V7 1/3] MIPS: Rearrange PTE bits into fixed positions.
From: "Steven J. Hill" <Steven.Hill@imgtec.com>
Date: Thu, 26 Feb 2015 21:38:33 -0600
Cc: <linux-mips@linux-mips.org>, <ralf@linux-mips.org>
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References: <1424996199-21366-1-git-send-email-Steven.Hill@imgtec.com> <1424996199-21366-2-git-send-email-Steven.Hill@imgtec.com> <54EFBF9D.4020004@gmail.com>
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On 02/26/2015 06:51 PM, David Daney wrote:
> 
> That's not really what I meant in my previous response on the subject.
> When I said:
> 
>     Why not just use RI for everything, instead of taking up two bits
>     to represent a single binary concept?
> 
>     For the case where there is no RI hardware active, it is a purely
>     software bit and you can easily invert the meaning and just have a
>     _PAGE_NO_READ bit.
> 
> I envisioned something like:
> 
>     64-bit, all revisions:    CCC D V G RI XI [S H] M A W P
>     32-bit, all revisions:    CCC D V G RI XI M A W P
> 
Which is what I implemented. I now only use one bit that functions
either as _PAGE_READ or _PAGE_READ_ONLY depending on the RI/XI
functionality present. Did you bother to read the code and understand
it, or just look at the commit message?

Steve


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