linux-mips
[Top] [All Lists]

[PATCH] MIPS: Expand __swp_offset() to carry 40 significant bits for 64-

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH] MIPS: Expand __swp_offset() to carry 40 significant bits for 64-bit kernel.
From: David Daney <ddaney.cavm@gmail.com>
Date: Tue, 24 Feb 2015 15:35:34 -0800
Cc: David Daney <david.daney@cavium.com>
Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=lci4VZr2lE/PFdH76IUMjC7WAG14dLbeIjtGnlNA7FY=; b=FpM8KDFxQFbo1Rxq36DLztgacGqWy8WiT2cMwjXDQGf8RkwBel2VfyhWxyVYsscOYQ K5gCqfVwPpLVSJoWpnlPZEtpcraO+GA+xODgVF/l5VYJF1DKJyRvN9j9zdR12P+jrBu7 DQMFArJLC0dq0JqrHRRYSgbU1ldMTyL/hYPNMTa3+3Y5Vxi1q8kJQWZbw4UiUIbUQcRY +AgAoxpxYRM0rJ46HeMHQlFwORvzL5cLDF+iOUY1CsHy8gFABsmInGlyoZwhPf/B5EWn Z75akhu7ABHwpt6LnacGlff9B2OHhTiKxqZzLFwcV2IUzWlcsWNItu47qS1UvV83inJI eU/g==
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
From: David Daney <david.daney@cavium.com>

With CONFIG_MIGRATION, the PFN of the migrating pages is stored in
__swp_offset(), so we must have enough bits to store the largest
possible PFN.  OCTEON NUMA systems have 41 bits of physical address
space, so with 4K pages (12-bits), we need at least 29 bits to store
the PFN.

The current width of 24-bits is too narrow, so expand it all the way
out to 40-bits.  This leaves the low order 16 bits as zero which does
not interfere with any of the PTE bits.

Signed-off-by: David Daney <david.daney@cavium.com>
---
 arch/mips/include/asm/pgtable-64.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/mips/include/asm/pgtable-64.h 
b/arch/mips/include/asm/pgtable-64.h
index 1659bb9..cf661a2 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -279,14 +279,14 @@ extern void pgd_init(unsigned long page);
 extern void pmd_init(unsigned long page, unsigned long pagetable);
 
 /*
- * Non-present pages:  high 24 bits are offset, next 8 bits type,
- * low 32 bits zero.
+ * Non-present pages:  high 40 bits are offset, next 8 bits type,
+ * low 16 bits zero.
  */
 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
-{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
+{ pte_t pte; pte_val(pte) = (type << 16) | (offset << 24); return pte; }
 
-#define __swp_type(x)          (((x).val >> 32) & 0xff)
-#define __swp_offset(x)                ((x).val >> 40)
+#define __swp_type(x)          (((x).val >> 16) & 0xff)
+#define __swp_offset(x)                ((x).val >> 24)
 #define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), 
(offset))) })
 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)  ((pte_t) { (x).val })
-- 
1.7.11.7


<Prev in Thread] Current Thread [Next in Thread>
  • [PATCH] MIPS: Expand __swp_offset() to carry 40 significant bits for 64-bit kernel., David Daney <=