linux-mips
[Top] [All Lists]

Re: [PATCH RFC v2 19/70] MIPS: Use the new "ZC" constraint for MIPS R6

To: Markos Chandras <markos.chandras@imgtec.com>
Subject: Re: [PATCH RFC v2 19/70] MIPS: Use the new "ZC" constraint for MIPS R6
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Tue, 20 Jan 2015 00:27:25 +0000 (GMT)
Cc: linux-mips@linux-mips.org, Matthew Fortune <Matthew.Fortune@imgtec.com>
In-reply-to: <1421405389-15512-20-git-send-email-markos.chandras@imgtec.com>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1421405389-15512-1-git-send-email-markos.chandras@imgtec.com> <1421405389-15512-20-git-send-email-markos.chandras@imgtec.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Alpine 2.11 (LFD 23 2013-08-11)
On Fri, 16 Jan 2015, Markos Chandras wrote:

> GCC versions supporting MIPS R6 use the ZC constraint to enforce a
> 9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC
> instructions.
> 
> Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
>  arch/mips/include/asm/compiler.h | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/include/asm/compiler.h 
> b/arch/mips/include/asm/compiler.h
> index c73815e0123a..8f8ed0245a09 100644
> --- a/arch/mips/include/asm/compiler.h
> +++ b/arch/mips/include/asm/compiler.h
> @@ -16,12 +16,20 @@
>  #define GCC_REG_ACCUM "accum"
>  #endif
>  
> +#ifdef CONFIG_CPU_MIPSR6
> +/*
> + * GCC uses ZC for MIPS R6 to indicate a 9-bit offset although
> + * the macro name is a bit misleading
> + */
> +#define GCC_OFF12_ASM() "ZC"
> +#else
>  #ifndef CONFIG_CPU_MICROMIPS
>  #define GCC_OFF12_ASM() "R"
>  #elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
>  #define GCC_OFF12_ASM() "ZC"
>  #else
>  #error "microMIPS compilation unsupported with GCC older than 4.9"
> -#endif
> +#endif /* CONFIG_CPU_MICROMIPS */
> +#endif /* CONFIG_CPU_MIPSR6 */
>  
>  #endif /* _ASM_COMPILER_H */

 I'd prefer to have a GCC version trap here just like with the microMIPS 
constraint.  What is the first upstream version to support R6?  5.0?

 Also rather than stating that the name of the macro has now become a 
misnomer I think it should actually be renamed to something more general, 
like `GCC_OFF_SMALL_ASM' (any better suggestions are welcome).  That'd 
have to be a separate patch though, to be applied first, preferably.

  Maciej

<Prev in Thread] Current Thread [Next in Thread>