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Re: [PATCH mips-for-linux-next] MIPS: check for D$ line size and CONFIG_

To: Florian Fainelli <>
Subject: Re: [PATCH mips-for-linux-next] MIPS: check for D$ line size and CONFIG_MIPS_L1_SHIFT
From: Ralf Baechle <>
Date: Thu, 23 Jan 2014 00:11:13 +0100
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On Wed, Jan 15, 2014 at 11:05:22AM -0800, Florian Fainelli wrote:

> When a platform overrides the dcache_line_size detection in its
> cpu-features-override.h file, check that the value matches
> (1 << CONFIG_MIPS_L1_SHIFT) to ensure both settings are correct.

Conceptually wrong - the two values serve an entirely different purpose.
dcache_line_size is used for cache maintenance by the MIPS code while
CONFIG_MIPS_L1_SHIFT - which has to be a constant due to the way it's
being used - are being used to define L1_CACHE_SHIFT in <asm/cache.h>
which in turn is being used primarily to optimize the memory layout of
various structures for performance - and in case of IP27 we lie, set
L1_CACHE_SHIFT to 7 which is the size of the S-cache.

On top of that it breaks the ip27 build.

And while we're at it, the use of CONFIG_MIPS_L1_SHIFT in
arch/mips/kernel/ is fishy - but it needs a constant and
this should be good enough for all users.


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