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Re: [PATCH v2 0/2] OCTEON GPIO support.

To: <>, Linus Walleij <>
Subject: Re: [PATCH v2 0/2] OCTEON GPIO support.
From: David Daney <>
Date: Mon, 29 Jul 2013 14:32:21 -0700
Cc: David Daney <>, <>, <>, <>, David Daney <>
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On 07/29/2013 02:29 PM, David Daney wrote:
From: David Daney <>

The Cavium, OCTEON is a MIPS based SoC.  Here we add support for its
on-chip GPIO lines.

Changes from v1: Cleaned up variable names, messages and added some
comments as suggested by Linus Walleij.

The second patch depends on the first, but is in code maintained by
Ralf.  It may be best to mrege both of these together, perhaps from
the GPIO tree, with Ralf's Acked-by.

Really I meant to say that the first patch is in the MIPS tree, and should be Acked-by Ralf, if that wasn't clear.

David Daney

David Daney (2):
   gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins.

  arch/mips/Kconfig                               |   1 +
  arch/mips/include/asm/mach-cavium-octeon/gpio.h |  21 ++++
  drivers/gpio/Kconfig                            |   8 ++
  drivers/gpio/Makefile                           |   1 +
  drivers/gpio/gpio-octeon.c                      | 157 ++++++++++++++++++++++++
  5 files changed, 188 insertions(+)
  create mode 100644 arch/mips/include/asm/mach-cavium-octeon/gpio.h
  create mode 100644 drivers/gpio/gpio-octeon.c

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