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Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.

To: Arnd Bergmann <>
Subject: Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.
From: David Daney <>
Date: Wed, 19 Jun 2013 12:12:09 -0700
Cc: David Daney <>, <>, <>, Jamie Iles <>, Greg Kroah-Hartman <>, Jiri Slaby <>, <>, <>, David Daney <>
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On 06/19/2013 11:52 AM, Arnd Bergmann wrote:
On Wednesday 19 June 2013, David Daney wrote:
On 06/19/2013 03:01 AM, Arnd Bergmann wrote:

It's also wrong to use the
__raw_* variant, which is not guaranteed to be atomic and is not

We do runtime probing and only use this function on platforms where it
is appropriate, so atomicity is not an issue.  As for endianess, I used
the __raw_ variant precisely because it is correct for both big and
little endian kernels.

You don't know what the compiler turns a __raw_writeq into, it could
always to eight byte wise stores, that's why typically writeq is
an inline assembly while __raw_writeq is just a pointer dereference.

Well, I do know that for the cases of interest, it will be a single load or store, but it is moot, as I rewrote that part.

__raw_* never do endian swaps,

Yes, I know that.

so it will be wrong on either big-endian
CPUs or on little-endian CPUs, depending on what the MMIO register

Please see the instruction set reference manual (MD00087-2B-MIPS64BIS-AFP-03.51 or similar) available at:

... for why you are mistaken. Pay particular attention to the low order address bit scrambling on narrow loads and stores and how this results in uniform (not affected by processor endian mode) load and store results for aligned 64-bit accesses. In effect, it is magic, and __raw_writeq yields correct results in both big and little endian modes of operation.

David Daney.

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