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Re: [PATCH 0/6] MIPS: BCM47XX: nvram read enhancements

To: Rafał Miłecki <>
Subject: Re: [PATCH 0/6] MIPS: BCM47XX: nvram read enhancements
From: Hauke Mehrtens <>
Date: Fri, 28 Dec 2012 12:32:49 +0100
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On 12/28/2012 01:00 AM, Rafał Miłecki wrote:
> 2012/12/27 Hauke Mehrtens <>:
>> On 12/27/2012 09:49 AM, Rafał Miłecki wrote:
>>> 2012/12/26 Hauke Mehrtens <>:
>>>> Clean up the nvram reading code and add support for different nvram
>>>> sizes.
>>>> This depends on patch "MIPS: bcm47xx: separate functions finding flash
>>>> window addr" by Rafał Miłeck, Patchwork:  
>>>> Hauke Mehrtens (6):
>>>>   MIPS: BCM47XX: use common error codes in nvram reads
>>>>   MIPS: BCM47XX: return error when init of nvram failed
>>>>   MIPS: BCM47XX: nvram add nand flash support
>>>>   MIPS: BCM47XX: rename early_nvram_init to nvram_init
>>>>   MIPS: BCM47XX: handle different nvram sizes
>>>>   MIPS: BCM47XX: add bcm47xx prefix in front of nvram function names
>>> Hm, the only question? Why so late ;) I've spent 3 hours yesterday
>>> debugging nvram on my WNDR4500, it didn't fill SPROM of PCIe cards
>>> correctly. Will test your patches today.
>> I waited till the bit in the flash part in bcma got into the mips tree.
>> Most of the patches in this series were already in my tree and OpenWrt
>> for some time.
>> Does it work now? Your patch was the most important one. In this series
>> only the "handle different nvram sizes" could fix the problem with your
>> device.
> I didn't have access to the hardware until now. It seems to be working
> now! I don't get invalid SPROM with rev 0 anymore.
> The only message log that bothers me is:
> [    0.716000] bcma: bus1: invalid sprom read from the PCIe card, try
> to use fallback sprom
> [    0.812000] can not parse nvram name pci/1/1/mcsbw402gpo(null) with
> value 0x0x88800000 got -22

Nice, an other form of invalid syntax (0x0x88800000) in the nvram, lets
see what the vendors do next. ;-)
This particular issue should not be a problem neither b43 nor brcmsmac
is reading this value and all the other values should be read from nvram


> I didn't have time to track it yet.

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