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[RFC 00/13] MIPS: JZ4750D: Add base support for Ingenic JZ4750D SOC

Subject: [RFC 00/13] MIPS: JZ4750D: Add base support for Ingenic JZ4750D SOC
From: Antony Pavlov <>
Date: Tue, 23 Oct 2012 21:53:42 +0400
Cc: Ralf Baechle <>, Lars-Peter Clausen <>, Maarten ter Huurne <>
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AFAIK the single known chip in Ingenic JZ4750D line is JZ4755.
It has just the same CPU core as JZ4740, but another set of
peripherals (though the program model for the most
of the peripherals is the same).

|                 |   JZ4755     |    JZ4740    |
| UART            |      3       |       4      |
| MSC (mmc/sd)    |      2       |       1      |
| GPIO            |     5x32     |      4x32    |
| TCU (timers)    | 6x16 + 1x32  |      8x16    |
| USB             |  device 2.0  |   host 1.1   |
|                 |              |  device 2.0  |

The most significant advantage of the JZ4755 chip
is the second MIPS core dedicated for image processing.
Also JZ4755 is made with use of more precise technology
and it can run on the higher clock rate (approx. 433 MHz
for JZ4755 vs 336 MHz for JZ4740).

The JZ4755 is used in some game consoles:
* Ritmix RZX-50;
* Dingoo A320E/A380;
* GameLinBox.

This patch series based on the work of Lars-Peter Clausen.
To tell the truth it is the Lars-Peter Clausen's patches
with some fixes and changes.

As most of the code for JZ4750D is very close to code
for JZ4740 we can incorporate the code for JZ4750D
to the code for JZ4740 to avoid code duplication.

I propose to rename 'jz4740' mach directory to 'xburst'
or 'ingenic'.

The patch series introduces the minimal support for the JZ4755,
no peripherals are enabled save UART1. To test the kernel
I run it with incorporated initrd rootfs made with help

Best regards,
  Antony Pavlov

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