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Re: [PATCH] MIPS: Add emulation for fpureg-mem unaligned access

Subject: Re: [PATCH] MIPS: Add emulation for fpureg-mem unaligned access
From: Ralf Baechle <>
Date: Tue, 31 Jul 2012 17:10:05 +0200
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On Tue, Jul 31, 2012 at 04:07:23PM +0200, Lluís Batlle i Rossell wrote:

> Maybe there could be a cleaner declaration of that intention, though. The only
> code there was "I herewith declare: this does not happen.  So send SIGBUS."

To give you an idea, the emulation is on the order of a 1000 times slower
than the processing a properly aligned load in hardware.  And even where
hardware does unaligned handling such as on x86 there still is a performance
penalty though that would far less severe.

So given that proper alignment is always the right thing.  There are very
few cases were handling misalignment in software is justified, for example
the IP stack.  Even the checks if a packet is misaligned would cause a
performance penalty and it's (assuming sane networking hardware) a very
rare event.

lwl/lwr in the IP stack would be a bad tradeoff.  It's faster than the
unaligned exception handler but would slow down processing of every
correctly aligned packet.  So lwl/lwr are only a good choice where a high
fraction of misaligned packets is expected.


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