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Re: some questions about mips timer

To: Ralf Baechle <>
Subject: Re: some questions about mips timer
From: David Daney <>
Date: Tue, 06 Mar 2012 12:33:44 -0800
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Cc: Florian Fainelli <>, loody <>, Linux MIPS Mailing List <>
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On 03/06/2012 12:27 PM, Ralf Baechle wrote:
On Tue, Mar 06, 2012 at 03:01:50PM +0100, Florian Fainelli wrote:

hi all:
I have some questions about mips_hpt_frequency:
1. is mips_hpt_frequency == mips cpu frequency?

No, it is usually cpu frequency / 2.

The architecture specification leaves the counter clock rate up up to the
implementation and only says the clock rate is a function of the pipeline
clock.  In all reality this means the counter is running at the full or
half frequency.  Just don't build on it,

   clock := pipeline_clock * next_weeks_lottery_number % 42

would by compliant ;-)

On some CPUs the frequency can even be selected through a configuration
bitstream at reset time so you can't always count on a fixed relation
between CPU clock and count rate.

Some older CPU manuals contain a confusing wording saying the counter
increments at half (or full) instruction issue rate.  That just means the
pipeline clock, no reason to be confused.

If you have a v2 or later ISA, you can use 'rdhwr x, $3' to find the ratio between the clock rate and the increment rate of the timer.

David Daney

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