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[PATCH 0/2] irq/of: Enchance irq_domain support.

Subject: [PATCH 0/2] irq/of: Enchance irq_domain support.
Date: Fri, 11 Nov 2011 17:50:14 -0800
Cc: David Daney <>
Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed;; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=0eYAUsd2AZC6lJBBWK38U5KJ5bNAlGzQ14neaizsg8Y=; b=S87mwBXLRt5ksBV+/SQTYjhEQ6SY6qfiSLcVoaz8hqbvdzqF28sXRKMiz9O1dKEDby jwaeo2Ms5ywTfmhcYQYl1k0nOUrnLe09flz7X0zvogcDRzj3PVv1VcB2FkLiKhSV6K3B IEWEirY69+Ui25CkuKPUZ1Q+kgN9vpmLDr+hA=
From: David Daney <>

This is the first cut at hooking up my Octeon port to the irq_domain things.

The Octeon specific patches are part of a larger set, and will need to
be applied with that set, the first patch is stand-alone.

The basic problem being solved taken from one of my other e-mails:

   Unfortunately, although a good idea, kernel/irq/irqdomain.c makes a
   bunch of assumptions that don't hold for Octeon.  We may be able to
   improve it so that it flexible enough to suit us.

   Here are the problems I see:

   1) It is assumed that there is some sort of linear correspondence
   between 'hwirq' and 'irq', and that the range of valid values is

   2) It is assumed that the concepts of nr_irq, irq_base and
   hwirq_base have easy to determine values and you can do iteration
   over their ranges by adding indexes to the bases.

David Daney (2):
  irq/of/ARM: Enhance irq iteration capability of irq_domain code.
  MIPS: Octeon: Add irq_create_of_mapping() and GPIO interrupts.

 arch/arm/common/gic.c                |   32 +++--
 arch/mips/Kconfig                    |    1 +
 arch/mips/cavium-octeon/octeon-irq.c |  279 +++++++++++++++++++++++++++++++++-
 include/linux/irqdomain.h            |   29 +++-
 kernel/irq/irqdomain.c               |   97 +++++++++---
 5 files changed, 390 insertions(+), 48 deletions(-)


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