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Re: RFC: A new MIPS64 ABI

To: Alexandre Oliva <>
Subject: Re: RFC: A new MIPS64 ABI
From: David Daney <>
Date: Tue, 15 Feb 2011 10:08:45 -0800
Cc: linux-mips <>, GCC <>, binutils <>, Prasun Kapoor <>
In-reply-to: <orzkpx6v2m.fsf@livre.localdomain>
Original-recipient: rfc822;
References: <> <orzkpx6v2m.fsf@livre.localdomain>
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On 02/15/2011 09:56 AM, Alexandre Oliva wrote:
On Feb 14, 2011, David Daney<>  wrote:

Current MIPS 32-bit ABIs (both o32 and n32) are restricted to 2GB of
user virtual memory space.  This is due the way MIPS32 memory space is
segmented.  Only the range from 0..2^31-1 is available.  Pointer
values are always sign extended.

The proposed new ABI would only be available on MIPS64 platforms.  It
would be identical to the current MIPS n32 ABI *except* that pointers
would be zero-extended rather than sign-extended when resident in

FTR, I don't really know why my Yeeloong is limited to 31-bit addresses,
and I kind of hoped an n32 userland would improve that WRT o32, without
wasting memory with longer pointers like n64 would.

So, sorry if this is a dumb question, but wouldn't it be much easier to
keep on using sign-extended addresses, and just make sure the kernel
never allocates a virtual memory range that crosses a sign-bit change,
or whatever other reason there is for addresses to be limited to the
positive 2GB range in n32?

No, it is not possible. The MIPS (and MIPS64) hardware architecture does not allow userspace access to addresses with the high bit (two bits for mips64) set.

Your complaint is a good summary of why I am thinking about n32-big.

David Daney

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