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Re: [PATCH resend 5/9] MIPS: sync after cacheflush

To: Kevin Cernekee <>
Subject: Re: [PATCH resend 5/9] MIPS: sync after cacheflush
From: "Gleb O. Raiko" <>
Date: Tue, 19 Oct 2010 12:54:33 +0400
Cc: Ralf Baechle <>, Shinya Kuribayashi <>,,
In-reply-to: <>
Organization: NIISI RAN
Original-recipient: rfc822;
References: <17ebecce124618ddf83ec6fe8e526f93@localhost> <17d8d27a2356640a4359f1a7dcbb3b42@localhost> <> <> <>
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On 18.10.2010 23:41, Kevin Cernekee wrote:
I have not been able to find any official statement from MIPS that
says that CACHE + SYNC should be used, but that seems like the most
intuitive way to implement things on the hardware side.

Indeed, both Architecture for Programmers in Vol. 2 describing instruction sets not so clearly say that sync is needed after cache. For example, documents with rev. 2.62, p. 92 (for MIPS32 ISA) or p. 96 (for MIPS64).

Considering whether just sync enough I'd like to note some boxes may implement dma master and slave blocks to be unsynchronized. Also,there may be write buffers somewhere in the path between cpu, memory, and even a dma master.

BTW, we have plat_extra_sync_for_device which has appropriate name but invented to do things before cache flush. :-) It seems we need another one which will do something after.


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