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Re: [PATCH v5 06/12] MIPS: add support for hardware performance events (

To: Deng-Cheng Zhu <>
Subject: Re: [PATCH v5 06/12] MIPS: add support for hardware performance events (mipsxx)
From: David Daney <>
Date: Sat, 29 May 2010 11:13:29 -0700
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On 05/28/2010 08:10 PM, Deng-Cheng Zhu wrote:
2010/5/28 David Daney<>:
General comments:

Can you separate the code that reads and writes the performance counter
registers from the definitions of the various counters themselves?
1) Do you mean to move M_PERFCTL_* stuff out into pmu.h (or mipsregs.h)?
If yes, that's OK. Again (my reply for [1/12] mentions this for the 1st
time): After making Oprofile use Perf-events as backend (patches 8~12 do
this), register definitions and read/write functions will locate in pmu.h
(or mipsregs.h) and perf_event_$cpu.c, respectively.
2) According to your reply to [7/12], do you mean the perf counter
read/write functions (such as mipsxx_pmu_read_counter()) are generic
support functions? No, they are specific for mipsxx CPUs.

Basically what I had in mind is that for all MIPS CPUs that have this style of performance counters, the counters are all read in the same manner (by reading the c0_PerfCnt registers). However each CPU type has its own set of events that can be counted.

So I was thinking to separate the common code that accesses the registers from the CPU specific code that deals with the specific names and properties of the various events.

David Daney

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