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Re: Porting U-boot on MIPS (Au1350)

To: Gurumurthy G M <>
Subject: Re: Porting U-boot on MIPS (Au1350)
From: Graham Gower <>
Date: Fri, 23 Apr 2010 15:24:36 +0930
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On 23 April 2010 15:08, Gurumurthy G M <> wrote:
> Hi All,
>       we are porting U-boot 1.2.0 to MIPS32 Au1350 Processor. i am using ELDK 
> 4.1 for MIPS32.
> Thanks wolfgang now am able to compile toolchain for mips after using ELDK 
> for MIPS.
> Now while porting U-boot to Au1350 MIPS32 we are facing following problems 
> mentioned below.
> We have a MIPS CPU which has reset address 0xBFC00000 , this is mapped to NOR 
> flash with XIP in place. The boot block  ( ie 0xBFC00000) is in the top block 
> of the NOR flash and its of 16KB. U-Boot shall be put from address 0xBFC00000 
> in the NOR flash for CPU boot up , since it is the last block (16KB only) we 
> cannot put complete U-Boot , some part of the U-Boot should go to lower 
> blocks . To do this u-boot need to be divided into blocks and we shall 
> provide a jump from the top block to other blocks of NOR flash. We have 
> BDI3000 debugger for flashing the NOR flash and bdiGDB for MIPS.

So, your NOR is mapped at: 0xbfc00000 + 16*1024 - 0x00200000 = 0xbfa04000 ?
Wouldn't it be simpler to get your hardware engineer(s) to map the NOR
flash to a saner address? e.g. 0xbfc00000.

> Is there any NOR flash drivers available which can support the below chip?
> NOR Flash chip : M29W160ET --> AM29BX16
> NOR Flash chip size is 0x00200000 --> 2MB

You'll probably have to add an entry for the chip in
linux/drivers/mtd/chips/jedec_probe.c and create a mapping driver
(plenty of really simple examples in linux/drivers/mtd/maps/).

> MIPS CPU Clock is 660MHz
> System Bus is 330MHz
> SDRAM bus clock is 165MHz
> please let me know if am going wrong anywhere or missing out something.
> With Regards,
> Gurumurthy Gowdar
> KPIT Cummins Infosystems Ltd


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