|To:||Ralf Baechle <email@example.com>, firstname.lastname@example.org|
|Subject:||Re: [PATCH 0/3] Add I2C support for Octeon SOCs.|
|From:||David Daney <email@example.com>|
|Date:||Mon, 11 Jan 2010 09:16:03 -0800|
|Cc:||"Bozic, Rade (EXT-Other - DE/Ulm)" <firstname.lastname@example.org>, linux-mips <email@example.com>, "Ben Dooks (embedded platforms)" <firstname.lastname@example.org>, "Jean Delvare (PC drivers, core)" <email@example.com>|
|References:||<4B463B1F.firstname.lastname@example.org> <4B463C71.email@example.com> <20100111144416.GA23157@linux-mips.org>|
|User-agent:||Thunderbird 220.127.116.11 (X11/20090320)|
Ralf Baechle wrote:
On Thu, Jan 07, 2010 at 11:56:33AM -0800, David Daney wrote:David Daney wrote:This patch set adds I2C driver support for Cavium Networks' Octeon processor family. The Octeon is a multi-core MIPS64 based SOC. The first patch adds platform devices for the I2C devices. The second patch is the main driver. Finally the third patch registers some devices so we have something to control with the fancy new driver. I will reply with the three patches. David Daney (2): MIPS: Octeon: Add I2C platform driver. MIPS: Octeon: Register some devices on the I2C bus. Rade Bozic (1): I2C: Add driver for Cavium OCTEON I2C ports.Do you want to merge this series through the MIPS tree?
Two of the patches touch only arch/mips/cavium-octeon, so it might make sense. But the I2C maintainers may have other desires, so I would defer to them.
|<Prev in Thread]||Current Thread||[Next in Thread>|
|Previous by Date:||Re: [PATCH 0/3] Add I2C support for Octeon SOCs., Ralf Baechle|
|Next by Date:||Re: [PATCH 0/3] Add I2C support for Octeon SOCs., Jean Delvare|
|Previous by Thread:||Re: [PATCH 0/3] Add I2C support for Octeon SOCs., Ralf Baechle|
|Next by Thread:||Re: [PATCH 0/3] Add I2C support for Octeon SOCs., Jean Delvare|
|Indexes:||[Date] [Thread] [Top] [All Lists]|