[Top] [All Lists]

Re: [PATCH]: R10000 Needs LL/SC Workaround in Gcc

Subject: Re: [PATCH]: R10000 Needs LL/SC Workaround in Gcc
From: Ralf Baechle <>
Date: Mon, 3 Nov 2008 17:35:22 +0000
In-reply-to: <>
Original-recipient: rfc822;
References: <> <> <87abcjibsl.fsf@firetop.home> <> <87tzargrn4.fsf@firetop.home> <> <> <>
User-agent: Mutt/1.5.18 (2008-05-17)
On Mon, Nov 03, 2008 at 10:51:49AM -0600, wrote:

> > I believe (but have not checked) that all CPUs/ISAs that are within the 
> >MIPS II - MIPS IV range enable -mbranch-likely by default, 
> Not quite.  sb1 has no-branch-likely.  It actually does implement the 
> instruction but the documentation clearly states that it should be avoided.

For the usual reasons - the CPU micro architects hate branch likely.  It
means having to cancel an instruction from the pipeline rather late, if
the branch was not taken.  So the deprecation just expresses the desparate
wish of the CPU architects to get rid of the instruction.  In practice
that won't happen any time soon - we even still have useless crap like
signed add and sub instructions in the MIPS ISA.  And if the instructions
actually were removed we still could software emulate them in the kernel.

However unlike the R10000 the SB1 and SB1 implement full blown branch
prediction for branch likely so use it where you can for performance.


<Prev in Thread] Current Thread [Next in Thread>