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Re: [PATCH 28/37] Cavium OCTEON FPU EMU exception as TLB exception

Subject: Re: [PATCH 28/37] Cavium OCTEON FPU EMU exception as TLB exception
From: Sergei Shtylyov <>
Date: Fri, 24 Oct 2008 14:39:31 +0400
Cc:, Tomaso Paoletti <>, Paul Gortmaker <>
In-reply-to: <>
Original-recipient: rfc822;
References: <> <>
User-agent: Thunderbird (Windows/20080914)
Hello. wrote:

The FPU exceptions come in as TLB exceptions -- see if this is
one of them, and act accordingly.

Signed-off-by: Tomaso Paoletti <>
Signed-off-by: Paul Gortmaker <>
Signed-off-by: David Daney <>
 arch/mips/mm/fault.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index fa636fc..9ce503a 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -47,6 +47,21 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned 
long write,
               field, regs->cp0_epc);

  Why this is not in the same patch that introduces this option?

+       /*
+        * Normally the FPU emulator uses a load word from address one
+        * to retake control of the CPU after executing the
+        * instruction in the delay slot of an emulated branch. The
+        * Octeon hardware unaligned access fix changes this from an
+        * address exception into a TLB exception. This code checks to
+        * see if this page fault was caused by an FPU emulation.
+        *
+        * Terminate if exception was recognized as a delay slot return */

I'm back to nitpicking again, see chapter 8 for the preferred multiuline comment style (you almost got it right :-).

+       extern int do_dsemulret(struct pt_regs *);

Won't this cause a warning about the declaration amidst of code? You should be able to put it in this function's declaration block painlessly...

WBR. Sergei

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