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Re: sparsemem support for mips with highmem

To: C Michael Sundius <>
Subject: Re: sparsemem support for mips with highmem
From: (Thomas Bogendoerfer)
Date: Fri, 15 Aug 2008 18:33:02 +0200
Cc: Dave Hansen <>,,,, Andy Whitcroft <>
In-reply-to: <>
Original-recipient: rfc822;
References: <> <1218753308.23641.56.camel@nimitz> <> <> <1218815299.23641.80.camel@nimitz> <>
User-agent: Mutt/1.5.13 (2006-08-11)
On Fri, Aug 15, 2008 at 09:12:14AM -0700, C Michael Sundius wrote:
> yes,  actually the top two bits are used in MIPS as segment bits.

you are confusing virtual addresses with physcial addresses. There
are even 32bit CPU, which could address more than 4GB physical
addresses via TLB entries.


Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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