I have something similar. Under 2.6.24, I have the following
Each bank of memory is in a separate node. I did have to write
some code in arch/mips/kernel/setup.c to setup the multiple memory
regions. I used some of the PPC NUMA code as an example, IIRC.
Because my second bank of mem starts at 0x20000000,
I use HIGHMEM to access it. There been some HIGHMEM info
posted to this list in the last 6 months.
I didn't think my efforts were general enough to post, but maybe
more people are doing these discontiguous memory platforms.
On Mon, 2008-07-14 at 09:30 -0700, Sundius, Michael wrote:
> I'm looking into turning on either sparse memory or discontiguous
> memory for a 32 Mips platform (single processor) since we have 2
> large memory banks that are nowhere near each other in physical
> What has been done in hardware, has been done and so be it.
> But since we are an embedded system, we do have memroy constraints and
> wish to conserve as much space as possible, we are trying to avoid
> pagetables for the whole space.
> That said, I have a few questions.
> 1) Are there any 32 Mips platforms where either sparsemem or
> discontigmem have been supported?
> 2) It seems like sparesemem is the wave of the future, am I
> correct in assuming that this is simmplier / more efficient /
> "better" way to go?
> 3) Is there anywhere (besides the code) where I can find an article
> or some documentation on how sparsemem and/or discontig work? or how
> to go about adding support for them in a here to for unsupported
> all info, pointers, hints, advice and comments are much appreciated.
> - - - - - Cisco
> - - - - -
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