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Re: Resend: [PATCH] [MIPS] Fix asm constraints for 'ins' instructions.

To: David Daney <>
Subject: Re: Resend: [PATCH] [MIPS] Fix asm constraints for 'ins' instructions.
From: Ralf Baechle <>
Date: Fri, 13 Jun 2008 15:28:54 +0100
Cc: GCC Mailing List <>, MIPS Linux List <>,
In-reply-to: <>
Original-recipient: rfc822;
References: <> <> <> <871w339hy9.fsf@firetop.home> <> <87k5gu8qey.fsf@firetop.home> <>
User-agent: Mutt/1.5.17 (2007-11-01)
On Thu, Jun 12, 2008 at 01:10:10PM -0700, David Daney wrote:

>>> Among the versions of GCC that can build the current kernel, will any
>>> fail on this code because the "i" constraint cannot be matched when
>>> expanded to RTL?
>> Someone will point this out if I don't, so for avoidance of doubt:
>> this needs to be always_inline.  It also isn't guaranteed to work
>> with "bit" being a separate statement.  I'm not truly sure it's
>> guaranteed to work even with:
>>     __asm__ __volatile__ ("  foo %0, %1" : "=m" (*p) : "i" (nr & 5));
>> but I think we'd try hard to make sure it does.
>> I think Maciej said that 3.2 was the minimum current version.
>> Even with those two issues sorted out, I don't think you can
>> rely on this sort of thing with compilers that used RTL inlining.
>> (always_inline does go back to 3.2, in case you're wondering.)
> Well I withdraw the patch.  With the current kernel code we seem to always 
> get good code generation.  In the event that the compiler tries to put the 
> shift amount (nr) in a register, the assembler will complain.  I don't think 
> it is possible to generate bad object code, so best to leave it alone.
> FYI, the reason that I stumbled on this several weeks ago is that 
> if(__builtin_constant_p(nr)) in the trunk compiler was generating code for 
> the asm even though nr was not constant.

How about I simply put your patch into the -queue tree, everybody gives it
a nice beating and then we'll how well it'll hold up in the real world?


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