Sorry, I should have said, I grabbed 126.96.36.199 to use. And after the
issues, I even tried the exact 2.6.15 tarball off Sigmas FTP with the
same results. It does not define flush_cache_pages for Atlas board, only
SGI IPxx from what I can tell.
Ralf Baechle wrote:
On Mon, Jan 07, 2008 at 09:39:29AM +0900, Jorgen Lundman wrote:
I have an embedded device running 2.6.15 kernel on a MIPS 4KEc 300MHz CPU.
It was configured for Sigma's tango2 board, which I know nothing about, so
I picked a mips-board by random, "atlas", and found I can produce working
kernel module compiles.
However, when I compiled FUSE kernel module, it behaves erratically in a
way making the FUSE developer think I may have come across the cache
coherency bug in arm and mips, fixed sometime around 2.6.17.
Since I can not change the kernel that is running, I was looking for
alternate solutions. FUSE itself has a work around, that calls
flush_cache_page(), but I found that mips-board atlas does not have this
While you may not be able to change the kernel running on your board,
you should be building any modules against kernel headers of the exact
kernel running and configured for the platform and CPU you're using.
Mixing and matching different versions and configurations may work but
frequently it will fail silently.
Jorgen Lundman | <email@example.com>
Unix Administrator | +81 (0)3 -5456-2687 ext 1017 (work)
Shibuya-ku, Tokyo | +81 (0)90-5578-8500 (cell)
Japan | +81 (0)3 -3375-1767 (home)