Here is a series of patches to bring the excite platform up to date. In
order to achieve this, I had to apply a couple of changes to some
non-platform code as well:
This one introduces a new configuration parameter named GPI_RM9000, used
to enable devices that depend on RM9000-style GPI hardware. This is a
re-submit, I submitted this patch before, but it has not been applied yet.
The RM9000 hazards in include/asm-mips/hazards.h were apparently wrong; I
could not get c0_compare_int_usable() in arch/mips/kernel/cevt-r4k.c to
work. The RM9122 manual says, "When a CP0 register is changed by an MTC0
or CTC0 instruction, the contents of the changed register must not be used
for 4 cycles after the MTC0 or CTC0 is issued. Specifically, if a CP0
register is loaded, its contents must not be read back or otherwise used
until 4 cycles later." I guess this also covers the case of observing
the result of writing to a CP0 register by reading the contents of
another CP0 register, as in this case.
Since the excite platform uses the RM9000's alternate timer interrupt, I
had to rework the compare interrupt setup. I changed the existing
get_c0_compare_int() hook to be called earlier than before, so that
cp0_compare_irq contains the correct value right from the start, and
functions like c0_compare_int_pending() and c0_compare_int_usable()
continue to function without any need for modifications. Then I added a
get_c0_perfcounter_int() hook to complement it. I also did some
minor modifications, like adding 'const' in some places, and outputting
an error message if the compare interrupt is found to be non-functional,
a condition that certainly deserves such a message.
Since the get_c0_compare_int() hook is used in
users of this file might theoretically be affected by this change. I do not
access to these boards, so I could not check, however, I believe the
change does not cause any breakage here.
Finally, the excite platform has to supply the alternate compare irq, which
this patch is for.
Thomas Köller, Software Developer
Basler Vision Technologies
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