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Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKARO

To: "Kevin D. Kissell" <>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
From: Ralf Baechle <>
Date: Tue, 13 Nov 2007 15:08:20 +0000
Cc: Franck Bui-Huu <>, Andrew Haley <>, David Daney <>,, Richard Sandiford <>,
In-reply-to: <019e01c82602$f5463bf0$10eca8c0@grendel>
Original-recipient: rfc822;
References: <> <> <> <> <019e01c82602$f5463bf0$10eca8c0@grendel>
User-agent: Mutt/1.5.14 (2007-02-12)
On Tue, Nov 13, 2007 at 03:37:39PM +0100, Kevin D. Kissell wrote:

> True, though it should perhaps be noted that currently it's only on 4KSc/Sd
> systems (which I know you work on) where it's even possible for the stack
> *not* to have exec permissions, since the classical MIPS MMU gives
> execute permission to any page that is readable.

Disabling PROT_EXEC on a mapping tells the kernel it doesn't need to take
care of I-cache coherency.  So it's somewhat beneficial even in absence of
a protection bit in the actual TLB hardware.

Some of these performance optimizations are impossible because the kernel
can't have definate knowledge that certain addresses have never entered the


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