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Re: MIPS atomic memory operations (A.K.A PR 33479).

To: "Maciej W. Rozycki" <>
Subject: Re: MIPS atomic memory operations (A.K.A PR 33479).
From: David Daney <>
Date: Wed, 19 Sep 2007 10:26:11 -0700
Cc: Ralf Baechle <>, Richard Sandiford <>, GCC Mailing List <>,
In-reply-to: <>
Original-recipient: rfc822;
References: <> <> <>
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Maciej W. Rozycki wrote:
On Wed, 19 Sep 2007, Ralf Baechle wrote:

Please make this loop closure branch a branch-likely.  This is necessary
as a errata workaround for some processors.

Do we emulate them for MIPS I? We do emulate "ll" and "sc" and adding "sync" is easy

Currently, I (and thus GCC 4.3) am assuming that Linux emulates 'll', 'sc' and 'sync', If sync is not emulated, we would need to adjust the code generation so that it is not emitted on ISAs that don't support it.

(as a no-op as support for R3000 SMP is unlikely to ever happen). Adding branches-likely, hmm... Even though we do have logic to do that as a part of the FP emulator.

A workaround for a CPU erratum fits within the "-mfix-*" option family quite well though.

Do we know which CPUs require branch-likely?

I would be inclined to agree with adding a "-mfix-??" option.

The only place where GCC's __sync_* primitives are generated without explicitly writing them into your program is in GCJ compiled java code that uses volatile fields.

If we expect the use of the __sync_* primitives on CPUs that require branch-likely to be rare, we shouldn't penalize those trying to rid themselves of the beasts.


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