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Re: MIPS 20Kc and WAIT instruction

To: Aurelien Jarno <>
Subject: Re: MIPS 20Kc and WAIT instruction
From: Ralf Baechle <>
Date: Tue, 12 Jun 2007 11:18:59 +0100
In-reply-to: <>
Original-recipient: rfc822;
References: <>
User-agent: Mutt/1.5.14 (2007-02-12)
On Mon, Jun 11, 2007 at 11:54:07AM +0200, Aurelien Jarno wrote:

> The latest kernels from or do not enter low
> power mode when the CPU is idle on a MIPS 20Kc CPU.
> Looking at the code in arch/mips/kernel/cpu-probe.c, the "case"
> corresponding to the 20Kc CPU is commented out:
>         case CPU_5KC:
> /*      case CPU_20KC:*/
>         case CPU_24K:
> According to the datasheet this CPU supports the WAIT instruction, so I
> don't really understand why it is disabled in the kernel. Does anybody
> know why?

CPU_20KC is MIPS64 so by definition supports a WAIT instruction - even
though an implementation would be legal as per architecture spec.

As for why it's commented out, I don't know.  The original patch to add
support was submitted by Carsten Langgaard ( in 2002
and already had the CPU_20KC commented out.  As for why one would do
something like that - my guess is as good as your's :-)  Trying to find
out more.


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