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Re: How to emulate lw/sw instruction by lb/sb instruction

To: "Kevin D. Kissell" <>
Subject: Re: How to emulate lw/sw instruction by lb/sb instruction
Date: Mon, 25 Sep 2006 18:35:01 +0800
In-reply-to: <001401c6e07e$8b07c080$10eca8c0@grendel>
Original-recipient: rfc822;
Dear Kevin
      Because there are some aligned instruction will load/store from/to
unaligned base address in some module,such as "lw t0,56(sp)  ##sp is odd
that's why I want some special version GCC can avoid generating load/store
4 bytes opcode,then I can use this "GCC" to compile specified module and
linked with others,it will avoid unnecessary exception processing when
these instruction to be invoked and come up with best performance for me.
William Lei

|         |           "Kevin D.        |
|         |           Kissell"         |
|         |           <>|
|         |                            |
|         |                            |
|         |           2006-09-25 16:42 |
  |       To:       <>, <>       
  |       cc:                                                                   
  |       Subject:  Re: How to emulate lw/sw instruction by lb/sb instruction   

The MIPS Linux kernel is capable of handling unalgined loads and
stores in emulation.  This is less efficient than synthesizing the word
access out of byte or left/right load/store operations in-line, but it's
only done when there really is an unaligned access, whereas forcing
the compiler to synthesize *all* loads/stores adds that overhead
even when the addresses are actually aligned.


            Kevin K.

----- Original Message -----
From: <>
To: <>
Sent: Monday, September 25, 2006 2:41 AM
Subject: How to emulate lw/sw instruction by lb/sb instruction

> Dear all
>       Could someone tell me how to modify GCC as titled?because we have
> problem while porting some middleware,which will generate some lw/sw
> instruction to unaligned address,so I would modify GCC to not generate
> lw/sw instructions for this pieces code.
> Regards
> William Lei
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