On Sat, 8 Jul 2006, Atsushi Nemoto wrote:
> Adding special short path for emulationg RDHWR which is used to
> support TLS.
You need to take care of VIVT I-caches.
> @@ -369,6 +369,39 @@ #endif
> BUILD_HANDLER dsp dsp sti silent /* #26 */
> BUILD_HANDLER reserved reserved sti verbose /* others */
> + .align 5
> + LEAF(handle_ri)
> + .set push
> + .set noat
> + mfc0 k0, CP0_CAUSE
> + MFC0 k1, CP0_EPC
> + bltz k0, handle_ri_slow /* if delay slot */
> + lw k0, (k1)
For a VIVT I-cache this can result in a TLB exception. TLB handlers are
not currently prepared for being called at the exception level.
Also I am fairly sure gas won't fill the branch delay slot above -- a
trivial rearrangement of code would save a cycle here (and this is a fast
path, so we do not want wasting time).
> + li k1, 0x7c03e83b /* rdhwr v1,$29 */
> + bne k0, k1, handle_ri_slow /* if not ours */
> + get_saved_sp /* k1 := current_thread_info */
> + MFC0 k0, CP0_EPC
> + LONG_ADDIU k0, 4
I suggest moving MFC0 ahead of get_saved_sp to avoid a stall. I would
fit in the branch delay slot nicely.