[Top] [All Lists]

Re: Instruction error with cache opcode

To: Atsushi Nemoto <>
Subject: Re: Instruction error with cache opcode
From: John Miller <>
Date: Sun, 14 May 2006 21:35:10 -0400
In-reply-to: <>
Original-recipient: rfc822;
References: <> <002a01c67761$253e97f0$0202a8c0@Ulysses> <> <>
User-agent: Thunderbird 1.5 (X11/20060313)
Atsushi Nemoto wrote:
On Sun, 14 May 2006 14:39:42 -0400, John Miller <> wrote:
I included asm/cacheops.h from the kernel tree, it is defined there as :

#define Index_Store_Tag_I       0x08

Then how about Fill_I ?

Atsushi Nemoto
That got it! Sorry, I had my head up somewhere it was not supposed to be. I do not know how many times I went over cacheops.h and missed the fact that Fill was defined, not Fill_I. One I changed my code to Fill, it built the kernel nicely. It still died before the first printk :) but at least I am a little closer. I got Fill_I out of the See MIPS Run book, it has the same option hex (0x14) as Fill, does anyone know why this changed?

<Prev in Thread] Current Thread [Next in Thread>