To: | "Kevin D. Kissell" <kevink@mips.com> |
---|---|
Subject: | Re: [RFC] Optimize swab operations on mips_r2 cpu |
From: | Ralf Baechle <ralf@linux-mips.org> |
Date: | Wed, 25 Jan 2006 14:14:24 +0000 |
Cc: | Franck <vagabon.xyz@gmail.com>, linux-mips@linux-mips.org |
In-reply-to: | <43D78725.6050300@mips.com> |
Original-recipient: | rfc822;linux-mips@linux-mips.org |
References: | <cda58cb80601250136p5ee350e6g@mail.gmail.com> <20060125124738.GA3454@linux-mips.org> <cda58cb80601250534r5f464fd1v@mail.gmail.com> <43D78725.6050300@mips.com> |
Sender: | linux-mips-bounce@linux-mips.org |
User-agent: | Mutt/1.4.2.1i |
On Wed, Jan 25, 2006 at 03:11:49PM +0100, Kevin D. Kissell wrote: > >>>Comments ? > >>Looks good aside of the one issue you've already raised yourself: > >> > >>>+/* FIXME: MIPS_R2 only */ > > > >I was actually asking for advices :) > > > >I can see only two simple ways to do that: > >(a) we can define a couple of new macro ie CONFIG_MIPS32_ISET_R[12] > >that can be set depending on the selected CPU; > >(b) define a new macro CONFIG_CPU_HAS_WSBH; > > Don't we already have CONFIG_CPU_MIPS32R2? We have CPU_MIPS32_R1, CPU_MIPS32_R2, CPU_MIPS64_R1, CPU_MIPS64_R2. Based on those we also define CPU_MIPS32, CPU_MIPS64, CPU_MIPSR1, and CPU_MIPSR2 as short cuts. In this particular case #include <linux/config.h> #ifdef CONFIG_CPU_MIPSR2 ... #else ... would be what we want. Ralf |
<Prev in Thread] | Current Thread | [Next in Thread> |
---|---|---|
|
Previous by Date: | Re: [RFC] Optimize swab operations on mips_r2 cpu, Kevin D. Kissell |
---|---|
Next by Date: | Re: [PATCH] IP32 gbefb depth change fix, Martin Michlmayr |
Previous by Thread: | Re: [RFC] Optimize swab operations on mips_r2 cpu, Kevin D. Kissell |
Next by Thread: | Re: [RFC] Optimize swab operations on mips_r2 cpu, Franck |
Indexes: | [Date] [Thread] [Top] [All Lists] |