In your summary you mention ...
"This probably explains why many developers who never use low-end embedded
processors don't care about (and usually don't even know of) these problems in
the 2.6 kernel."
The desktop/server guys typically use much larger caches (i.e. >= 512K)
and most have L2, compared to embedded systems which typically use less
without an L2. So I'd also expect embedded guys using small caches to see
larger decreases in performance due to more cache misses (i.e. more
interrupts produce more evictions).
> -----Original Message-----
> From: email@example.com
> [mailto:firstname.lastname@example.org]On Behalf Of Wolfgang Denk
> Sent: Monday, January 09, 2006 1:24 PM
> To: Kevin D. Kissell
> Cc: Sathesh Babu Edara; email@example.com
> Subject: Re: [processor frequency]
> In message <005a01c614fb$2fe76b00$10eca8c0@grendel> you wrote:
> > There is no "ideal" value for a given processor frequency.
> > The lower the value, the less interrupt processing overhead,
> > but the slower the response time to events that are detected
> > or serviced during clock interrupts. 1000 HZ *may* be a sensible
> > value (I have my doubts, personally) for 2+ GHz PC processors,
> > but it's excessive (IMHO) for a 200MHz processor and unworkable
> > for a 20MHz CPU. I think that 100HZ is still a reasonable value
> > for an embedded RISC CPU, but the "ideal" value is going to
> > be a function of the application.
> We did some tests of the performance impact of 100 vs. 1000 Hz clock
> frequency on low end systems (50 MHz PowerPC); for details please see
> Best regards,
> Wolfgang Denk
> Software Engineering: Embedded and Realtime Systems, Embedded Linux
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: firstname.lastname@example.org
> Our missions are peaceful -- not for conquest. When we do battle, it
> is only because we have no choice.
> -- Kirk, "The Squire of Gothos", stardate 2124.5