On Fri, Feb 04, 2005 at 02:39:07PM +0000, Nigel Stephens wrote:
> The MIPS 24K family's caches are not physically indexed, but they do
> have optional h/w assist to prevent aliases in certain cache
> configurations. This optional feature is indicated by the read-only AR
> (alias removed) flag being set - that's bit 16 in the CP0 Config7 register.
That's not a new feature in the MIPS world; the R10000 family introduced
that first and Linux knows how to make use of it. So now I just need to
teach c-r4k.c to check the AR bit on the 24K.