On Tue, Oct 19, 2004 at 11:51:29PM +0900, Atsushi Nemoto wrote:
> In include/asm-mips/cache.h:
> #define ARCH_KMALLOC_MINALIGN 8
> Is this line really needed?
> If it was not defined (and ARCH_KMALLOC_FLAGS was also not defined),
> default alignment (cache_line_size()) will be used for kmalloc. It is
> enough, isn't it?
The alignment needs to be large enough to store an arbitrary fundamental
data type including the 64-bit types such as long long or double.
cache_line_size() is only used if a slab has SLAB_HWCACHE_ALIGN set.
The effect of not guaranteeing 8 byte alignment are subtle at times because
the kernel unaligned handling is going to hide the problem. So just
performance will suffer. It used to show up clearly only in the
floating point context switch because we don't support software emulation
of missaligned floating point loads and stores.
> Also, with current 8 byte alignment, many PCI drivers which are using
> kmalloc and dma_map_single are broken on non-coherent system. I was
> told that those drivers should use dma_get_cache_alignment() API, but
> currently nobody do it anyway. Removing ARCH_KMALLOC_MINALIGN will
> help those (broken?) drivers.
The alignment requirements are documented in Documentation/DMA-API.txt
and they are specified the way they are for good reason.