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Re: Problem caused by forcing interrupt vector location to 0x91xx0200 in

To: Kang <>
Subject: Re: Problem caused by forcing interrupt vector location to 0x91xx0200 instead of 0x80000200
From: Michael Uhler <>
Date: 14 Oct 2004 18:39:32 -0700
In-reply-to: <>
Organization: MIPS Technologies, Inc.
Original-recipient: rfc822;
References: <>
Prior to Release 2 of the MIPS32 Architecture, the exception vectors
were fixed at a base of 0x80000000, which put the vectored interrupt
offset at 0x80000200.

The MIPS32 4Kc processor is an implementation of Release 1 of the
Architecture, so it has a fixed exception vector base.  (Note that
the MIPS32 4KEc - the added 'E' is significant - implements Release 2
so in case you mis-typed, there is a solution using the 4KEc).

So with a Release 1 implementation, your only really solution is
to put a jump at 0x80000200 to where you want the code to be.
I suspect that this isn't really what you want.


On Thu, 2004-10-14 at 18:29, Kang wrote:
> Hello buddies,
> I am working on a MIPS4Kc based reference design board. For some
> reason, I need to force the interrupt vector location to address
> 0x91xx0200 instead of 0x80000200 in arch/mips/kernel/traps.c. The
> kernel was loaded into 0x91xxxxxx space as well.
> The kernel hung just after the interrupt was first time opened, after
> sti(), before calibrate_delay() in init/main.c. It was weird that I
> didn't see any problem if I put interrupt vector to location
> 0x80000200 while all other exception vectors to 0x91xxxxxx.
> Was interrupt vector location hardcode to the address 0x80000200? Or
> some other place I need to change to walk around it. Any idea?
> Thanks a bunch for your help.
> Leo

Michael Uhler, Chief Technology Officer
MIPS Technologies, Inc.  Email:
1225 Charleston Road
Mountain View, CA 94043

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