Thiemo Seufer (firstname.lastname@example.org) writes:
> > So we're proposing:
> > o The register name<->number mapping is that of n64.
> > o Calling convention: register-, not slot-based. Each argument is
> > represented by a register value. Arguments 0-7 travel in registers
> > a0-7 (or fa0-7 as required for floating point types).
> This suggests to have no fp temporaries left: fv0-1, fa0-7, fs0-5.
> Is this intentional?
No, there are lots really...
Long, long ago early MIPS CPUs had to use FP registers in pairs to get
FP doubles, so had only 16 effective registers.
But there are 32 real double-precision FP registers in all known
modern MIPS CPUs (well, all known pretty old ones, really) once you
turn off the backward-compatibility bit in the status register. I
forgot to mention that... (or I could claim, weasel words, that this
is implied by the "name<->number mapping of n64").