Roman Mashak wrote:
When I compile little-endian only image, as far as I understood, I got image
without RESET code at the beginning, so according to the memory map and link
script (link_el.xn) - starting entry point is __RESET_HANDLER_END (locating
in init.S) and its address is 0x9fc10000.
So, I don't quite understand, how will be going after CPU reset? As
documentation's saying "following a reset, hardware fetches instructions
starting at the reset exception vector 0xBFC00000". But what is waiting at
this address, because reset code (reset.S) is not compiled and is not
I think you are using modified YAMON sources... I can tell you how
the build process works for the distributed version of YAMON:
Invoking make in the yamon/bin directory build two YAMON images (one
big-endian & one little-endian) in the EB & EL subdirectories. In
addition some endianess independent reset code (reset.o) is built in
yamon/bin. These three images are combined together to make a single
yamon-02.xx.rec image that can run in either endianess.
If you're only interested in running little-endian you should be able
to simply combine the reset-02.xx.rec and EL/yamon-02.xx_el.rec images.
Chris Dearman The Fruit Farm, Ely Road voice +44 1223 706206
MIPS Technologies (UK) Chittering, Cambs, CB5 9PH fax +44 1223 706250