Atsushi Nemoto wrote:
Well technically it should be dma_cache_wback_inv(), though they equate
to the same function currently.
On Sun, 28 Mar 2004 14:04:00 +0100, Peter Horton <firstname.lastname@example.org> said:
pdh> I've ditched the original Cobalt hack in c-r4k.c, and am using
pdh> the patch below instead. Seems to work okay ...
+ for (; addr < (void *) end; addr += PAGE_SIZE)
+ flush_data_cache_page((unsigned long) addr);
dma_cache_wback() will be more efficient ?
It would be more efficient, but the dma_cache_*() functions are only
available under CONFIG_DMA_NONCOHERENT, and our problem has nothing to
do with DMA coherency at all.
All we really need to do is add a flush_dcache_range(from,to) function.
I'm working on this at the moment.
There maybe other block drivers (SCSI?) that use insb/insw/insl that
would also cause us grief, but we could provide both versions of the
functions and select them as necessary.
Also, I personally think replacing all insb/insw/insl is a bit
overkill. I'd prefer redefine insb/insw/insl in asm-mips/ide.h, but
I'm not sure it is enough. (really all ins[bwl] should take care of
the cache inconsistency?)